1. Field of the Invention
The present invention relates to the field of integrated circuit amplifiers. More particularly, the present invention relates to such amplifiers having a differential amplifying stage in which a pair of semiconductor devices, having one electrode of each connected to each other, each receives an input signal at an input electrode and provides an amplified differential signal at at least one output electrode of the semiconductor devices, wherein the differential signal is a function of the difference between the received input signals.
2. Description of the Prior Art
Integrated circuit differential amplifiers are known in which a pair of transistors is connected in either a common base or common emitter configuration so as to function as a differential amplifier. In such amplifiers the voltage produced at a collector electrode of one of the transistors is related to the amplified difference between input signals received at input electrodes of the pair of transistors. In such amplifiers, typically substantially identical biasing circuitry is utilized in order to attempt to equally bias each of the pair of differential amplifier transistors. The amplified differential signal is then coupled as an input to an output stage which typically has a high input impedance and low current loading effect so as to prevent any substantial loading at the collector at which the amplified differential signal is provided. However, it has been determined that even under such conditions, conduction of the output stage may cause sufficient impedance and current loading to effectively unbalance the differential amplifier pair of transistors. Attempting to rebalance this structure by providing an additional fixed impedance and current load to the collector of the differential pair which does not provide the differential signal to the output stage would only achieve desired balancing for one level of conduction of the output stage. Thus the differential stage would not be balanced for other output stage conduction levels.
Unbalanced operation of the differential pair of transistors means that the resultant differential signal will now not be a true differential signal but will have an offset, or error, variation which will vary in accordance with the impedance and current loading of the output stage. This may be just a minor effect if there is always an appreciable difference between the two different applied input signals being amplified. However, when these signals are approximately equal to each other, the loading effect of the output stage may be sufficient to provide differences in the turn-on (base-emitter) thresholds of the differential amplifying transistors. This can lead to an appreciable error or offset in the amplified differential signal.